ReKonf: Dynamically reconfigurable multiCore architecture

Applications differ in their computational requirements. A single application too can have diverse requirements during its different phases. In this thesis, we present ReKonf, a dynamically reconfigurable tile based multicore architecture that detects the program phase change at runtime and morphs itself into different configurations to suit the program phase behavior. We use space and time efficient performance counters for estimating performance gains from candidate architectural configurations. In our design space exploration we have identified the suitability of architectural components namely, number of cores, cache size, and cache sharing, for reconfigurability. To select the right configuration for a workload, we develop three cache reconfiguration and core clustering techniques namely, static, dynamic and adaptive reconfiguration techniques. The thesis shows that executing an application on the “right” configuration significantly improves performance over fixed architectures. Further we explore the reconfiguration opportunities in an embedded multicore domain where saving energy is as important a goal as enhancing performance. Choosing video decoding as a typical application, we develop a dynamic core allocation algorithm for video decoding on embedded multicore platforms with the objective of reducing energy consumption while guaranteeing a quality of service (QoS). We show that substantial energy savings can be achieved on multicore architectures by employing dynamic core allocation. Finally we combine cache reconfiguration and dynamic core allocation in the ReKonf architecture and evaluate performance enhancement and energy preservation for video decoding. After obtaining the minimum number of cores for decoding a frame, we utilize the ReKonf infrastructure to identify the most beneficial cache configuration for that number of cores. The ReKonf architecture configures to the assigned number of cores and its associated cache configuration, before it decodes a frame. Our methodology may be used in embedded platforms for achieving energy savings by employing a combination of core allocation and cache reconfiguration.